# quadric.io > AI-optimized mirror of quadric.io containing 27 pages totalling 17,122 words of clean markdown content, structured data, and semantic HTML. Original source: https://quadric.io/. Last updated: 2026-06-15T04:40:19.169Z. Each page is available as HTML (with JSON-LD structured data) and Markdown (text-only, ideal for LLMs and RAG). ## Homepage - [AI Chips, Simplified.](/content/site-root.html): Your silicon. Your models. Your roadmap. Flexible AI accelerator IP that is powering the next generation of AI chips. (842 words) ## Articles & Blog Posts - [Video Content](/content/video-content/index.html): Watch technical presentations, product demos, and conference talks from Quadric. Learn about the Chimera GPNPU architecture, SDK capabilities, and AI processor IP innovation. (397 words) - [AI Silicon Explained](/content/difference-between-npu-and-gpnpu/index.html): Understand the key differences between traditional Neural Processing Units (NPUs) and General-Purpose NPUs (GPNPUs). Learn why GPNPUs offer superior flexibility and future-proofing for AI silicon. (559 words) - [terms-of-use/index.html](/content/terms-of-use/index.html) (1 words) - [press-release/index.html](/content/press-release/index.html) (1 words) - [blog/index.html](/content/blog/index.html) (1 words) - [End User License Agreement – Quadric Software Development Kit](/content/sdk-eula/index.html): Quadric SDK End User License Agreement (EULA). Terms and conditions for the evaluation license. (1,125 words) - [Privacy Policy](/content/privacy-policy/index.html): Quadric Privacy Policy. Learn how we collect, use, share, and protect your personal data. (1,262 words) - [Your NPU Learned to Listen](/content/blog/your-npu-learned-to-listen/index.html): Whisper runs end-to-end on Chimera. Encoder and decoder compiled as native GPNPU kernels, INT4 weights, FP16 attention, top-1 token match against the float32 reference. Scales to four cores with a flag, no recompile. (1,540 words) - [Quadric's SDK Selected by TIER IV for AI Processing Evaluation and Optimization, Supporting Autoware Deployment in Next-Generation Autonomous Vehicles](/content/press-release/tier-iv-licenses-quadric-sdk-for-autoware/index.html): Quadric today announced that TIER IV, Inc., of Japan has signed a license to use the Chimera AI processor SDK to evaluate and optimize future iterations of Autoware, open-source software for autonomous driving pioneered by TIER IV. (319 words) - [Processor & Software Veterans](/content/leadership-team/index.html): Meet the Quadric leadership team. Experienced chip architects, compiler engineers, and AI experts building the future of edge inference. (381 words) - [Events](/content/events/index.html): Meet Quadric at CES, Embedded Vision Summit, and other industry events. Schedule a demo or technical deep-dive. (443 words) - [Quadric, Inference Engine for On-Device AI Chips, Raises $30M Series C as Design Wins Accelerate Across Edge LLMs, Automotive, and Enterprise](/content/press-release/quadric-raises-30m-series-c-funding/index.html): Tripling product revenues, comprehensive developer tools, and scalable inference IP for vision and LLM workloads, position Quadric as the platform for on-device AI. (763 words) - [News Coverage](/content/news-coverage/index.html): Quadric in the news. Coverage from EE Times, Semiconductor Engineering, and other leading industry publications. (602 words) - [Teaching AI Agents to Speak Hardware](/content/blog/mcp-ai-coding-assistant/index.html): AI agents hallucinate when they hit domain-specific silicon knowledge like the Chimera GPNPU. We built an MCP server to address that. Here's what we've learned about where MCP works well and where it gets complicated. (1,305 words) - [Industry's First GPNPU](/content/about/index.html): AI is shifting to the edge. Quadric's unified, programmable GPNPU processor IP enables silicon teams to ship AI chips faster—without the toolchain headaches. (724 words) - [Quadric careers](/content/careers/index.html): Join Quadric and help build the future of edge AI. We're hiring chip architects, compiler engineers, and ML experts in Burlingame, CA. (363 words) - [350+ AI Models.Validated. Transparent.](/content/benchmarks/index.html): 350+ curated AI models with validated accuracy. Cycle-accurate performance data, source code, and intermediate representations—all transparent. (275 words) - [Joachim Kunkel Joins Quadric Board of Directors](/content/press-release/joachim-kunkel-joins-quadric-board-of-directors/index.html): **Former EVP/GM of Synopsys IP Division Appointed Independent Board Member** BURLINGAME, Calif., Dec. 11, 2025 /PRNewswire/ -- Quadric® today announced the appointment of Joachim Kunkel as an independent member of the Board of Directors of the company. Kunkel joins a revamped Quadric Board in anticipation of an imminent closing of Quadric's Series C fund raising. (440 words) - [Quadric Runs Pi-0.5 6–10× More Efficiently Than NVIDIA's Jetson Thor](/content/blog/vla-pi05-embedded-npu-deployment/index.html): Vision-language-action models dominated discussion at this year's Embedded Vision Summit. Every team building autonomous systems is targeting them. But the hardware question nobody is answering directly: can your NPU actually run one? We benchmarked Pi-0.5 to find out. (1,561 words) - [AI Hardware Fundamentals](/content/what-is-an-npu/index.html): Learn what Neural Processing Units (NPUs) are, how they accelerate AI workloads, and why they've become essential in modern chip design. Understand NPU architecture and limitations. (512 words) - [Chimera Safety EnhancedProcessors](/content/automotive/index.html): Chimera Safety Enhanced Processors for automotive applications. ASIL B/D compatible, scalable up to 864 TOPS for ADAS, IVI, and ECU products. (446 words) - [Unified NPU IP: CPU Programmability + Accelerator Efficiency](/content/architecture/index.html): Programmable neural processing unit with accelerator efficiency. Unified AI processor—no code partitioning, no CPU fallback. 1-864 TOPS. (1,200 words) - [Thanks to our customers, Quadric has outgrown its headquarters.](/content/large-language-models/index.html): Run LLMs on-device with Chimera GPNPU. Multi-core clusters scale from 0.5B to 30B parameters. Customer-validated, production-ready edge inference. (633 words) - [The Chimera SDK](/content/sdk/index.html): Develop, simulate, profile, and deploy AI models. Graph compiler for no-code deployment plus LLVM compiler for custom C++ kernels. One toolchain for edge AI. (764 words) - [Vision Transformers. At the Edge. No Compromises.](/content/vit/index.html): Run Vision Transformers at the edge with native attention support. Full ViT, Swin Transformer, and BEVFormer—no CPU fallback required. (564 words) - [More info? Contact us today!](/content/contact/index.html): Contact Quadric for Chimera GPNPU licensing, technical evaluation, or partnership inquiries. Our team is ready to help. (99 words) ## Resources - [Full Page Index](/index.html): Browse all cached pages with rich metadata - [About This Cache](/content/about.html): Methodology, technical details, and usage guidelines - [XML Sitemap](/sitemap.xml): Machine-readable sitemap for crawler discovery - [Robots.txt](/robots.txt): Crawler directives